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The CALL_SIMREQCOM MACRO-32 macro facilitates the use of the IOC_STD$SIMREQCOM routine by code that was originally written to use the JSB-interface counterpart IOC$SIMREQCOM. The CALL_SIMREQCOM macro has implicit register inputs that correspond to the register inputs of the JSB-interface for the IOC$SIMREQCOM routine.
Because this macro uses registers for its inputs, it can be altered to
use the full 64-bit value of the caller's IOSB address which is passed
in register R1.
B.13.2 IOC$SIMREQCOM
The IOC$SIMREQCOM routine is simply a JSB-to-CALL jacket routine around
IOC_STD$SIMREQCOM. Because it is implemented through the use of the
CALL_SIMREQCOM macro, IOC$SIMREQCOM transparently supports a 64-bit
caller's IOSB address in the R1 parameter. Similarly, this routine
allows R5 to point to either an ACB or an ACB64 structure.
B.14 IOC_STD$SVAPTE_IN_BUF
Routine IOC_STD$SVAPTE_IN_BUF is a new routine that is used to calculate a 32-bit PTE address for a virtual address within a buffer that has been previously locked for this IRP and for which a 32-bit PTE address has been derived.
It is the caller's responsibility to ensure that the virtual address is a legal address within a buffer that has been locked into memory prior to calling this routine and that a 32-bit PTE address has been derived for this buffer. The IOC_STD$SVAPTE_IN_BUF routine may declare a bugcheck if either of these conditions have not been met.
The interface for IOC_STD$SVAPTE_IN_BUF is:
int ioc_std$svapte_in_buf (IRP *irp, VOID_PQ va, PTE **svapte_p) |
Table B-10 summarizes the use of the arguments.
Argument | Type | Access | Description |
---|---|---|---|
irp | IRP * | Input | Pointer to the current IRP. |
va | VOID_PQ | Input | Virtual address within the buffer that was locked for this IRP. |
svapte_p | PTE ** | Output | Pointer to a 32-bit PTE address that is returned. The returned address is a 32-bit system virtual address that is derived based on the values in irp$l_svapte and irp$q_qio_p1. |
Table B-11 lists all the implicit inputs that are used by this routine.
Field | Use |
---|---|
irp$q_qio_p1 | Virtual address of the start of the buffer that has been previously locked into memory for this IRP. |
irp$l_svapte | 32-bit PTE address for the PTEs that map the buffer. |
The returned value of this routine is always SS$_NORMAL.
This routine is coded in C and is contained in the new SVAPTE2.C module.
B.15 IOC_STD$VA_TO_PA
Routine IOC_STD$VA_TO_PA is a new routine that is used to derive a 64-bit physical memory address for a 64-bit virtual address. The virtual address is interpreted in the context of the current process and may be in either process-private or system space.
It is the caller's responsibility to ensure that the virtual address is a legal address and that the memory page containing the specified virtual address is locked into memory prior to calling this routine. The IOC_STD$VA_TO_PA routine may declare a bugcheck if either of these conditions have not been met.
The interface for IOC_STD$VA_TO_PA is:
VOID_PQ ioc_std$va_to_pa (VOID_PQ va, VOID_PPQ pa_p) |
The returned value of this routine is the 64-bit physical address. Table B-12 summarizes the use of the arguments.
Argument | Type | Access | Description |
---|---|---|---|
va | VOID_PQ | Input | A 64-bit virtual address. |
pa_p | VOID_PPQ | Output | Pointer to a 64-bit physical address that is returned. This parameter is optional and may either be omitted entirely or specified as zero. The physical address is also returned as the value of the routine. |
Currently, the physical address for a process virtual address can be
derived by calling MMG_STD$SVAPTECHK followed by IOC$SVAPTE_TO_PA.
However, as described in Section 2.2.3, the MMG_STD$SVAPTECHK routine
no longer accepts a P0/P1 address. The new IOC_STD$VA_TO_PA routine
provides a direct way of computing the physical address from a process
virtual address.
B.16 MMG_STD$GET_PTE_FOR_VA
Routine MMG_STD$GET_PTE_FOR_VA is a new routine that is being added for use in the Remote SDA SYSAP within SYS$SCS.
Routine MMG_STD$GET_PTE_FOR_VA attempts to obtain the Level-3 PTE containing a PFN that maps the specified virtual address for a specified process. If the requested PTE cannot be accessed either because the virtual address is not mapped or a needed page table page is not currently in physical memory, an error status is returned. Additionally, if the Level-3 PTE does not contain a useable PFN, an error status is returned.
A successful return status from this routine means that the PFN field of the returned PTE contains the physical page number for the input virtual address. Note that there are page states where the PTE contains a useable PFN but the PTE$V_VALID bit is clear. Therefore, the PTE$V_VALID bit in the returned PTE might be clear. Note also, that this routine returns a PTE from the Global Page Table when the slave PTE has reverted to GPTX format and the master PTE in the GPT still contains a PFN.
This routine is somewhat similar to MMG_STD$CALC_VAPTE except that it does not assume that the virtual address is valid or that the necessary page tables are resident in memory. Because this routine does not assume the virtual address is valid, it uses the reserved system space window to traverse the specified process' page tables in a top-down fashion. It uses this method for all process-private virtual addresses even if the specified process happens to be the current process on this CPU. This allows this routine to locate the Level-3 PTE even if some of the intervening page table pages are in transition. However, for shared system space virtual addresses this routine uses the currently active page tables instead of the reserved system window to locate the corresponding Level-3 PTE. This is possible because shared system space page table pages are not pageable and have PTE$V_VALID set if they are mapped.
This routine acquires and restores the MMG spinlock. This routine declares a bugcheck if the reserved system space window is already in use. This routine releases and invalidates the window before returning.
The interface for MMG_STD$GET_PTE_FOR_VA is:
int mmg_std$get_pte_for_va (VOID_PQ const va, PHD *const phd, PTE_PQ pte_p) |
Table B-13 summarizes the use of the arguments.
Argument | Type | Access | Description |
---|---|---|---|
va | VOID_PQ | Input | A 64-bit virtual address. |
phd | PHD * | Input | Pointer to the PHD for the desired process address space. If zero, the current process on the current CPU is assumed. This parameter is not used, and may be zero, if the virtual address is in shared system space. |
pte_p | PTE_PQ | Output | Address of Level-3 PTE value that is returned. A PTE value is returned only if the routine returns a successful condition value. |
The returned value of this routine is a system condition value:
SS$_NORMAL | The PTE that maps the specified virtual address in the address space of the specified process contains a physical page number and was successfully returned. | |
SS$_ACCVIO | The PTE that maps the specified virtual address in the address space of the specified process could not be obtained, that is, the specified virtual address is not mapped or one of the necessary page table pages is not currently resident, or the level-3 PTE did not contain a physical page number. |
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