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This section describes the additions to the driver Function Decision Table (FDT) structure (see Table A-8).
Field | Type | Comments |
---|---|---|
fdt$q_ok64bit | unsigned int64 | A 64-bit mask corresponding to the 64 possible I/O function codes. The corresponding bit is set if the function supports a 64-bit $QIO p1 parameter value. This cell is initialized to zero by the MACRO-32 macro FDT_INI, the BLISS macro FDTAB, and in the prototype FDT, DRIVER$FDT, which is used by drivers written in C. This cell has been added to the end of the existing FDT structure. |
This section describes the additions and changes to cells in the I/O Request Packet (IRP) structure. The significant IRP changes are:
The size of an IRP has increased by 160 bytes (43%), from 376 to 536 bytes (see Table A-9).
Field | Type | Comments |
---|---|---|
irp$b_mode | unsigned char | This is an existing cell in the IRP that contains the caller's mode in the low-order 2 bits. The irp$l_acb_flags cell is considered valid by SCH$QAST if and only if ACB$M_FLAGS_VALID mask is set in this cell. The ACB$M_FLAGS_VALID mask is always set in this cell by EXE$QIO when the IRP is allocated. |
irp$l_acb64x_offset | int | Offset to the ACB64X structure embedded in this IRP. This cell is considered valid by SCH$QAST if and only if ACB$M_64BITS is set in the irp$l_acb_flags cell. This cell is initialized to the offset value of the irp$pq_acb64_ast field. This cell corresponds to the acb64$l_acb64x cell. Because this cell is at the same offset as the acb$l_ast cell, the irp$l_ast cell has been removed. |
irp$l_acb_flags | unsigned int | This cell has been initialized to the mask value ACB$M_64BITS to indicate that the irp$l_acb64x_offset field contains an offset to the ACB64X structure. Corresponds to the acb$l_flags cell. |
irp$l_thread_pid | int | Corresponds to the acb$l_thread_pid cell. Reserved for use by the Kernel Threads project. |
irp$pq_acb64_ast | VOID_FUNC_PQ | This cell corresponds to the acb64$pq_ast cell and replaces the irp$l_ast cell. |
irp$l_ast | - | This cell has been removed. It has been replaced by the irp$pq_acb64_ast cell. |
irp$l_shd_iofl | IRP * | This is an existing cell that contains the link to the cloned shadowing IRPs. This cell was overlaid on irp$l_ast and is now overlaid on the low-order longword of the irp$pq_acb64_ast cell. |
irp$l_iirp_p0 | int | Generic parameter cell that is available in internal IRPs. This cell overlays the low-order longword of the irp$pq_acb64_ast cell and is intended for use by components that use the irp$l_ast cell for this purpose. |
irp$q_acb64_astprm | int64 | This cell corresponds to the acb64$q_astprm cell and replaces the irp$l_astprm cell. |
irp$l_astprm | - | This cell has been removed. It is replaced by the irp$q_acb64_astprm cell. |
irp$l_shad | SHAD * | This is an existing cell in IRPs cloned by shadowing that points to the SHAD structure. This cell was overlaid on irp$l_astprm and is now overlaid on the low-order longword of the irp$q_acb64_astprm cell. |
irp$l_hrb | HRB * | This is an existing cell in MSCP server IRPs that points to a Host Request Block structure. This cell was overlaid on irp$l_astprm and is now overlaid on the low-order longword of the irp$q_acb64_astprm cell. |
irp$l_mv_tmo | int | This cell is used in internal mount verification IRPs to contain the timeout value. This cell overlays the low-order longword of the irp$q_acb64_astprm cell and is intended for use by components that currently use the irp$l_astprm cell for this purpose. |
irp$l_iirp_p1 | int | Generic parameter cell that is available in internal IRPs. This cell overlays the low-order longword of the irp$q_acb64_astprm cell and is intended for use by components that use the irp$l_astprm cell for this purpose. |
irp$q_user_thread_id | uint64 | Unique user thread identifier. Corresponds to the acb64$q_user_thread_id cell. Reserved for use by the Kernel Threads project. |
irp$pq_iosb | VOID_PQ | 64-bit pointer to the caller's IOSB. This cell replaces irp$l_iosb . |
irp$l_iosb | - | This cell has been removed. It is replaced by the irp$pq_iosb cell. |
irp$l_cln_wle | unsigned int | This is an existing cell that contains the shadowing write log state. This cell was overlaid on irp$l_iosb and is now overlaid on the low-order longword of the irp$pq_iosb cell. |
irp$l_iirp_p2 | int | Generic parameter cell that is available in internal IRPs. This cell overlays the low-order longword of the irp$pq_iosb cell and is intended for use by components that use the irp$l_iosb cell for this purpose. |
irp$pq_va_pte | PTE_PQ | A 64-bit pointer to the actual PTEs that map the user buffer. If the user buffer is not in shared system space, then this PTE virtual address is only valid in the caller's process context. |
irp$l_svapte | PTE * | A 32-bit pointer to PTE values that map the user buffer. The PTE values may be copies of the actual PTEs in Page Table Space that map the user buffer. If zero, then no PTEs have been locked for this request. Note that for compatibility with existing drivers, this cell remains overlaid on irp$ps_bufio_pkt and this use is valid only if IRP$M_BUFIO is clear in irp$l_sts . Note also that this cell contains a pointer into the CPT structure if IRP$M_CACHEIO is set in irp$l_sts2 . |
irp$ps_bufio_pkt | BUFIO * | Pointer for the buffered I/O packet for this request. If zero, then no packet has been allocated for this request. Note that for compatibility with existing drivers, this cell remains overlaid on irp$l_svapte and this use is valid only if IRP$M_BUFIO is set in irp$l_sts . |
irp$r_diobm | DIOBM | Embedded fixed-size primary "direct I/O buffer map" structure. This embedded DIOBM structure is valid if and only if irp$l_svapte points to a set of PTEs whose pages have been locked down for direct I/O. Specifically, the DIOBM is in use when both IRP$M_BUFIO and IRP$M_CACHEIO in irp$l_sts are clear and the irp$l_svapte cell contains a non-zero value. See Section A.6 for a complete description of the DIOBM structure. |
irp$q_qio_p1 | int64 | Copy of device dependent $QIO parameter p1. The low order 32-bits of this cell remain accesible via irp$l_qio_p1 . |
irp$q_qio_p2 | int64 | Copy of device dependent $QIO parameter p2. The low order 32-bits of this cell remain accesible via irp$l_qio_p2 . |
irp$q_qio_p3 | int64 | Copy of device dependent $QIO parameter p3. The low order 32-bits of this cell remain accesible via irp$l_qio_p3 . |
irp$q_qio_p4 | int64 | Copy of device dependent $QIO parameter p4. The low order 32-bits of this cell remain accesible via irp$l_qio_p4 . |
irp$q_qio_p5 | int64 | Copy of device dependent $QIO parameter p5. The low order 32-bits of this cell remain accesible via irp$l_qio_p5 . |
irp$q_qio_p6 | int64 | Copy of device dependent $QIO parameter p6. The low order 32-bits of this cell remain accesible via irp$l_qio_p6 . |
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