HP OpenVMS systems documentation

D
Data
embedded in code #1
embedded in code #2
overwriting
See also Aligning data
/DEBUG qualifier
ALL option
NONE option
SYMBOLS option
TRACEBACK option
Debugging compiled code
$ARGn symbols
differences from debugging assembled code
symbols for routine arguments
treatment of routine arguments
with floating-point data
with packed decimal data
.DEFAULT directive
.DEFINE_LINKAGE directive #1
.DEFINE_LINKAGE directive #2
in porting from OpenVMS Alpha to OpenVMS I64
.DEFINE_PAL directive
Descriptor formats
checking with $IS_DESC64 macro
Development environment
DEVICELOCK operator
DEVICEUNLOCK operator
Diagnostic messages
disabling reporting
interpreting
/DIAGNOSTICS qualifier
Differences between compiler and assembler
instruction scheduling #1
instruction scheduling #2
interleaved instructions #1
interleaved instructions #2
reserved operand faults
Directives #1
Directives #2
unsupported #1
unsupported #2
Dirty zeros
.DISABLE ABSOLUTE directive
.DISABLE directive #1
.DISABLE directive #2
FLAGGING option
OVERFLOW option
QUADWORD option #1
QUADWORD option #2
/DISABLE qualifier
FLAGGING option #1
FLAGGING option #2
OVERFLOW option #1
OVERFLOW option #2
QUADWORD option #1
QUADWORD option #2
.DISABLE TRUNCATION directive
DRAINA instruction
DV (decimal overflow trap enable)
Dynamic image relocation
D_floating format
on OpenVMS Alpha systems
E
ELF object file format
EMODx floating-point instruction
Emulation library
required files
.ENABLE ABSOLUTE directive
.ENABLE directive #1
.ENABLE directive #2
FLAGGING option
OVERFLOW option
QUADWORD option #1
QUADWORD option #2
/ENABLE qualifier
FLAGGING option
OVERFLOW option
QUADWORD option #1
QUADWORD option #2
.ENABLE TRUNCATION directive
Entry-point directives #1
Entry-point directives #2
Entry-point directives #3
Entry-point directives #4
Entry-point directives #5
Entry-point directives #6
register sets
when to use
Entry-point register arguments
compiler hints
declaring
input
Entry-point register set
declaring
scratch
Entry points
when to declare
Epilogue code
preserving registers #1
preserving registers #2
using REI to change modes
Error messages
interpreting
ESCD instruction
ESCE instruction
ESCF instruction
EV6 Alpha processor #1
EV6 Alpha processor #2
EVAX_* built-ins
EVAX_CALLG_64 built-in
64-bit address support #1
64-bit address support #2
EVAX_LQxL built-in
EVAX_SEXTL built-in
sign extension for 64-bit address support #1
sign extension for 64-bit address support #2
EVAX_STxC built-in
.EVEN directive
Event flags
synchronization guarantees
Exception entry point
declaring #1
declaring #2
Exception handlers
modifying
Exceptions, arithmetic
.EXCEPTION_ENTRY directive #1
.EXCEPTION_ENTRY directive #2
.EXCEPTION_ENTRY directive #3
.EXCEPTION_ENTRY directive #4
EXE$REI_INIT_STACK
using to change mode
External symbols
and static initialization
F
Faults
reserved operand
FEN (floating-point enable) bit
/FLAG qualifier #1
/FLAG qualifier #2
/FLAG qualifier #3
/FLAG qualifier #4
Flagging
disabling #1
disabling #2
disabling #3
enabling #1
enabling #2
specifying
Floating-point data
debugging code with
Floating-point instructions
Flow control mechanisms
branches from JSB routines
condition codes
FORKLOCK operator
FORKUNLOCK operator
FP
Alpha register
modifying
negative offsets
positive offsets
referencing local storage
zero offset #1
zero offset #2
zero offset #3
zero offset #4
zero offset #5
zero offset #6
Frame pointer (FP)
See FP
G
Generated code #1
Generated code #2
detecting
.GLOBAL_LABEL directive
Granularity
byte and word-write operations #1
byte and word-write operations #2
byte and word-write operations #3
interlocked instructions
preserving
Granularity controls
subordinate to atomicity
H
Hints
enabling #1
enabling #2
for specifying registers #1
for specifying registers #2
Homed argument list
$ARGn symbols
detecting
HOME_ARGS argument
.CALL_ENTRY directive
HPARITH condition code
H_floating instruction
I
I64 architecture
I64 register mapping
IA64 symbol
Image
relocating
Informational messages
disabling reporting
Initialization
static
using external symbols
Input register argument
Input register mask
Input register set #1
Input register set #2
Input register set #3
Instruction scheduling
differences between VAX and Alpha/I64
optimization
Instruction size
dependency on
Instruction stream
data embedded in #1
data embedded in #2
modifying
Instructions
Alpha #1
Alpha #2
Alpha #3
compiler built-ins for Alpha assembly language
floating-point
incomplete
interleaving
interlocked memory
packed decimal
using Alpha #1
using Alpha #2
using Alpha #3
using Itanium
Interlocked instructions
atomicity
synchronization guarantees
Interlocked queue instructions
synchronization guarantees
Internal processor registers
See IPRs
IPL
IPRs (internal processor registers)
$IS_32BITS macro
checking sign extension #1
checking sign extension #2
checking sign extension #3
$IS_DESC64 macro
checking if format descriptor is 64-bit #1
checking if format descriptor is 64-bit #2
Itanium instructions
using
IV (integer overflow trap enable)